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Fort Myers, FL, August 2005 - Crystek Corporation announces its entrance into the PLL/Synthesizer arena with the introduction of its CPLL66 family. The CPLL66 is a complete PLL/Synthesizer needing only an external frequency reference and supply voltages for the internal PLL (phase lock loop) and VCO (voltage controlled oscillator). The Crystek CPLL66 is programmed using a standard three line interface (Data, Clock and Load Enable).
"The development of the CPLL66 was a natural progression to compliment our already extensive line of VCOs," said Ramon Cerda, Crystek's director of engineering. "We've successfully wrapped a VCO around a PLL in a package that's only marginally larger than a VCO on its own, and significantly smaller than separate VCO/PLL modules."
The newly introduced CPLL66 family has been initially released to cover 1GHz to 5GHz in bands. It is housed in a compact 0.6-in. x 0.6-in. x 0.15-in. SMD package which saves board space. Typical phase noise at 4GHz is -90dBc/Hz at 10KHz offset with 0dBm minimum output power.
Applications include digital radio equipment, fixed wireless access, satellite communications systems, base stations, personal communications systems, portable radios and test instruments.
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